2016 IEEE International Electron Devices Meeting

Welcome to the Editor Press Center. The following press materials may be downloaded from this site for pre-conference publicity for the 2016 IEDM.
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Welcome to the Editor Press Center. Check back periodically for photo and caption updates. The following press materials may be downloaded from this site for pre-conference publicity for the IEDM:

2016 IEDM Press Releases:

2016 IEDM Photos with captions:
Selected images from the abstracts are presented in two formats:
- Word file with images associated with a highlighted paper and the caption
- JPEG file with individual high-resolution Images

Paper #2.6, "A 7nm FinFET Technology Featuring EUV Patterning and Dual-Strained High-Mobility Channels"
R. Xie et al, IBM/Globalfoundries/Samsung
Image With Caption
2-6 A 7nm CMOS Platform Technology Using EUV Lithography.docx
High Resolution Images
2.6 Figure 3.jpg
2.6 Figure 10.jpg
2.6 Figure 23.jpg

Paper #2.7, "A 7nm Platform Technology Featuring 4th Generation FinFET Transistors with a 0.027μm2 High-Density 6-T SRAM Cell for Mobile SoC Applications"
S.Y. Wu et al, TSMC
Image With Caption
2-7 A 7nm CMOS Platform Technology for Mobility.docx
High Resolution Images
2.7 Figure 4.tif
2.7 Figure 12.tif
2.7 Figure 14a.tif

Paper #3.1, "SiGe HBT with fT/fmax of 505 GHz/720 GHz"
B. Heinemann et al, IHP
Image With Caption
3-1 Fastest Silicon-Based HBT.docx
High Resolution Images
3.1 Figure 1c.jpg

Paper #5.1, "Carbon Nanotube Complementary Logic with Low-Temperature Processed End-Bonded Metal Contacts"
J. Tang et al, IBM
Image With Caption
5-1 End-Bonded Contacts for N- and P-Type Carbon Nanotubes.docx
High Resolution Images
5.1 Figure 10a.jpg
5.1 Figure 10c.jpg

Paper #6.6, "Wearable Sweat Biosensors"
W. Gao et al, University of California, Berkeley
Image With Caption
6-6 Wearable Sweat Biosensors.docx
High Resolution Images
6.6 Figure 1.jpg

Paper #7.6, "A Physics-Based Compact Model for Material- and Operation-Oriented Switching Behaviors of CBRAM"
Y.D. Zhao et al, Peking University/ Innovation Center for MicroNanoelectronics and Integrated System (China)/Hong Kong Polytechnic University
Image With Caption
7-6 Modeling CBRAM Operation.docx
High Resolution Images
7.6 Figure 3.jpg

Paper #8.6, "A 1.8e- Temporal Noise Over 90dB Dynamic Range 4k2k Super 35mm Format Seamless Global Shutter CMOS Image Sensor with Multiple-Accumulation Shutter Technology"
Kawabata et al, Canon, Inc.
Image With Caption
8-6 CMOS Imager with Global Shutter.docx
High Resolution Images
8.6 Figure 7.jpg
8.6 Figure 8.jpg

Paper #10.1, "1.7 kV/1.0 mΩcm2 Normally-Off Vertical GaN Transistor on GaN Substrate with Regrown p-GaN/AlGaN/GaN Semipolar Gate Structure"
D. Shibata et al, Panasonic
Image With Caption
10-1 V-Shaped Channel for Record GaN Threshold Voltage.docx
High Resolution Images
10.1 Figure.4.jpg

Paper #11.5, "A 28nm HKMG Super-Low-Power Embedded NVM Technology Based on Ferroelectric FETs"
M. Trentzsch et al, Globalfoundries/NaMLab gGmbH/Ferroelectric Memory GmbH/Fraunhofer IPMS/RacyICs GmbH/TU Dresden
Image With Caption
11-5, FeRAM Embedded Memory for IoT.docx
High Resolution Images
11.5 Figure 2.jpg

Paper #13.4, "SOI Technology for Quantum Information Processing"
S. De Franceschi et al, CEA/University Grenoble Alpes
Image With Caption
13-4 Toward Scalable Quantum Processing.docx
High Resolution Images
13.4 Figure 1.jpg

Paper #13.5, "Cryo-CMOS for Quantum Computing"
E. Charbon et al, Delft University of Technology/EPFL/Institut Superieur d’Electronique de Paris/Tsinghua University/Univ. California, Berkeley
Image With Caption
13-5 Cryo-CMOS Circuits to Support Quantum Computing.docx
High Resolution Images
13.5 Figure 13.jpg

Paper #14.7, "Prospects of Ultra-Thin Nanowire-Gated 2D-FETs for Next-Generation CMOS Technology"
W. Cao et al, University of California, Santa Barbara
Image With Caption
14-7 Making & Modeling Dielectrics & Gates on 2D MoS2 Substrate.docx
High Resolution Images
14.7 Figure 1.jpg
14.7 Figure 3b.jpg

Paper #15.1, "Reliability Characteristics of 10nm FinFET Technology with Multi-Vt Gate Stack for Low Power and High Performance"
M. Jin et al, Samsung
Image With Caption
15-1 10nm FinFET Reliability.docx
High Resolution Images
15.1 Figure 20a.jpg

Paper #15.8, "Local Thermometry of Self-Heated Nanoscale Devices"
F. Menges et al, IBM
Image With Caption
15-8 Mapping Hot Spots at 10nm and Below.docx
High Resolution Images
15.8 Figure 9a.jpg

Paper #16.1, "Hyperdimensional Computing with 3D VRRAM In-Memory Kernels: Device-Architecture Co-Design for Energy-Efficient, Error-Resilient Language Recognition"
H. Li et al, Stanford/University of California, Berkeley/National Nano Device Laboratories
Image With Caption
16-1 Brain-Like Computing with 3D Vertical RRAM.docx
High Resolution Images
16.1 Figure 16.jpeg

Paper #17.1, "Air Spacer for 10nm FinFET CMOS and Beyond"
K. Cheng et al, IBM/Globalfoundries
Image With Caption
17-1 Air Spacers to Reduce Capacitance in 10nm FinFETs.docx
High Resolution Images
17.1 Figure 3.tif
17.1 Figure 10.jpg
17.1 Figure 12.jpg

Paper #18.2, "Graphene-Gate Transistors for Gas Sensing and Threshold Control"
N. Harad et al, Fujitsu
Image With Caption
18-2 Exquisitely Sensitive Gas Sensor.docx
High Resolution Images
18.2 Figure 3.jpg

Paper #19.1, "Vertical InAs/GaAsSb/GaSb Tunneling Field-Effect Transistor on Si with S=48 mV/decade and Ion=10 µA/µm for Ioff = 1 nA/µm at VDS = 0.3 V"
E. Memisevic et al, Lund University
Image With Caption
19-1 TFET with Record On-Current.docx
High Resolution Images
19.1 Figure 4 color.jpg
19.1 Figure 4.jpg
19.2 Figure 2.jpg

Paper #20.1, "Wide Bandgap (WBG) Power Devices and Their Impacts on Power Delivery Systems"
A. Huang, North Carolina State University
Image With Caption
20-1 Wide-Bandgap Power Devices and Their Impacts on Power Delivery Systems.docx
High Resolution Images
20.1 Figure 6.jpg

Paper #20.6, "Horizon Beyond Ideal Power Devices"
H. Ohashi, NPERC-J (Japan’s New-Generation Power Electronics & System Research Consortium)
Image With Caption
20-6 Nega-Watts.docx
High Resolution Images
20.6 Figure 10.jpg

Paper #22.2, "First Demonstration of a Back-Side Integrated Heterogeneous Hybrid III-V/Si DBR Laser for Si-Photonics Applications"
J. Durel et al, STMicroelectronics/CEA-LETI/University Grenoble Alpes/Vistec Electron Beam GmbH
Image With Caption
22-2 Big Step Toward Silicon Photonics.docx
High Resolution Images
22.2 Figure 3.jpg

Paper #25.3, "Monolithic Integration of AgTe/TiO2-Based Threshold Switching Device with TiN Liner for Steep Slope Field-Effect Transistors"
J. Song et al, Pohang University of Science and Technology
Image With Caption
25-3 Conductive Filament Forms & Dissolves to Enable Sharp On-Off Switching.docx
High Resolution Images
25.3 Figure 19.jpg
25.3 Figure 23.jpg

Paper #26.5, "GaN-on-Si μLED Optoelectrodes for High-Spatiotemporal-Accuracy Optogenetics in Freely Behaving Animals"
K. Kim et al, University of Michigan/New York University/Tel Aviv University
Image With Caption
26-5 Devices for Studying the Brain.docx
High Resolution Images
26.5 Figure 5.jpg

Paper #27.1, "4Gbit Density STT-MRAM Using Perpendicular MTJ Realized with Compact Cell Structure"
S.W. Chung et al, SK Hynix/Toshiba
Image With Caption
27-1 First 4 GB STT-MRAM.docx
High Resolution Images
27.1 Figure 1.jpg
27.1 Figure 2.jpg

Paper #29.6, "On-Chip Terahertz Electronics: From Device-Electromagnetic Integration to Energy-Efficient, Large-Scale Microsystems"
R.Han et al, MIT/Office of Naval Research/Cornell University/University of Michigan/STMicroelectronics/University of Texas at Dallas/Naval Research Lab
Image With Caption
29-6 On-Chip Terahertz Electronics.docx
High Resolution Images
29.6 Figure 3a.jpg
29.6 Figure 3b.jpg

Paper #30.2, "A Tunnel FET Design for High-Current, 120 mV Operation"
P. Long et al, Purdue University/Imec/University of California, Santa Barbara/University of Virginia
Image With Caption
30-2 Designing High-Current TFETs.docx
High Resolution Images
30.2 Figure 4.jpg

Paper #32.1, "An Active Artificial Iris Controlled by a 25-μW Flexible Thin-Film Driver"
F. DeRoose et al, Imec/KU Leuven
Image With Caption
32-1 Smart Contact Lens.docx
High Resolution Images
32.1 Figure 1.jpg
32.1 Figure 2.jpg

  • 2016 IEDM Short Course - Design Technology Enablers for Computing Applications
  • 2016 IEDM Short Course - Technology Options at the 5-Nanometer Node
  • 2016 IEDM Tutorial - Electronic Architectures for Neuromorphic Computing
  • 2016 IEDM Tutorial - Embedded Systems and Innovative Technologies for IoT Applications
  • 2016 IEDM Tutorial - FEOL Reliability
  • 2016 IEDM Tutorial - Physical Characterization of Advanced Devices
  • 2016 IEDM Tutorial - Technologies for IoT and Wearable Applications
  • 2016 IEDM Tutorial - The Struggle to Scale BEOL

  • San Francisco, CA image (JPEG)
  • IEDM logo (JPEG)
    If you plan to attend, please let us know. Also, the conference organizers are planning to have a press luncheon at the beginning of the IEDM to discuss the most interesting papers and the major technology trends evident in this year's program. We encourage journalists to attend it, and details will be provided in November.

    Whether you would like to do a news story, conference preview or an in-depth exploration of a particular technology, please contact one of us for the additional information or interviews you may need.

    Editor Contacts:
    Gary Dagastine, co-Media Relations Director, at gdagastine@nycap.rr.com or by telephone at +1 518 785 2724
    Chris Burke, co-Media Relations Director, at chris.burke@btbmarketing.com or by telephone at +1 919 872 8172

    Registration/attendance questions:
    Can be answered by the Conference Manager Phyllis Mahoney, at phyllism@widerkehr.com or by telephone at +1 301 527 0900.
    19803 Laurel Valley Place, Montgomery Village, MD 20886 USA

    IEEE International Electron Devices Meeting (IEDM) is the world’s pre-eminent forum for reporting technological breakthroughs in the areas of semiconductor and electron-device technology, design, manufacturing, physics, and modeling. IEDM is the flagship conference for nanometer-scale CMOS transistor technology, advanced memory, displays, sensors, MEMS devices, novel quantum and nano-scale devices and phenomenology, optoelectronics, devices for power and energy harvesting, high-speed devices, as well as process technology and device modeling and simulation. The conference scope not only encompasses devices in silicon, compound, and organic semiconductors, but also emerging material systems.